1. Field of the Invention
The present invention relates to a wiring substrate and a method of manufacturing a wiring substrate.
2. Description of the Related Art
Conventionally, a wiring substrate is known in which a wiring layer is stacked on an insulating layer, and further a solder resist layer, which becomes an outermost layer, provided with an open portion that exposes a part of the wiring layer is formed on the insulating layer. In such a wiring substrate, there is a case that a pad is formed on the wiring layer that is exposed within the open portion of the solder resist layer such that to project from an upper surface (an outermost surface of the wiring substrate) of the solder resist layer (Patent Document 1, for example).
However, in such a wiring substrate, a structure to prevent peeling of the pad is not provided. Thus, for example, there is a possibility that the pad is peeled when bonding the pad of the wiring substrate to a semiconductor chip or after bonding the pad of the wiring substrate to the semiconductor chip.